1. Field of the Invention
This invention relates to a power supply circuit and a CCD camera using the same, and more particularly to a power supply circuit for supplying a positive polarity power voltage and a negative polarity power voltage, particularly, to a camera using a CCD imager or a display unit using an LCD panel, for example.
2. Description of the Prior Art
The motion-picture and/or still-picture cameras using, for example, a CCD imager usually require four power voltages of 3.3V, 5V, 15V and −7.5V, and accordingly use a positive/negative-voltage power supply circuit.
In the positive/negative-voltage power supply circuits, there is a necessity that each terminal of the CCD imager be satisfied by an absolute maximum rating of CCD when turning on or off a power switch of the camera. In particular, there may be a case that the above requirement cannot be satisfied due to a long discharge period of time (voltage attenuation time period) for a comparatively high voltage, such as 15V and −7.5V, upon turning off the power switch.
Meanwhile, the discharge time period during turning off the power is determined by a capacitance of a smoothing capacitor and an input impedance on a load (CCD imager) side. Therefore, the discharge time can be optimally set by adjusting a discharging resistance and a capacitance of a smoothing capacitor connected in parallel with the load. That is, the discharge time can be shortened by decreasing the capacitance of the smoothing capacitor and/or reducing the discharge resistance.
However, there is a limitation in decreasing the capacitance of the smoothing capacitor because there arises inconvenience in securing a performance, such as increase of noises, of a power supply circuit. On the other hand, the reduction in discharge resistance results in increase in steadily-consumable current (load current), giving rise to another problem such as lower in efficiency for the power supply circuit.